/*

  Author:  Joe Krachey
  Date:  07/09/2018

*/


module example_peripheral(
  // signals to connect to an Avalon clock source interface
  clk,
  reset,
  // signals to connect to an Avalon-MM slave interface
  slave_address,
  slave_read,
  slave_write,
  slave_readdata,
  slave_writedata,
  slave_byteenable,
  // Non-Avalon Interface IO
  gpio_inputs,
  gpio_outputs,
  irq_out
);

  //*******************************************************************
  // Module Interface
  //*******************************************************************
  input clk;
  input reset;
  
  // slave interface
  input [4:0] slave_address;
  input slave_read;
  input slave_write;
  output wire [31:0] slave_readdata;
  input [31:0] slave_writedata;
  input [3:0] slave_byteenable;


  input [31:0] gpio_inputs;
  output [31:0] gpio_outputs;
  output wire irq_out;


  //*******************************************************************
  // Register Addresses
  //*******************************************************************
  localparam	DEV_ID_ADDR	    = 5'b0000;
  localparam	GPIO_IN_ADDR	= 5'b0001;
  localparam	GPIO_OUT_ADDR	= 5'b0010;
  
  
  //*******************************************************************
  // Register Set
  //*******************************************************************
  reg  [31:0] dev_id_r;
  reg  [31:0] gpio_in_r;
  reg  [31:0] gpio_out_r;

   //*******************************************************************
  // Wires/Reg
  //*******************************************************************
  wire  [31:0] gpio_in;
  wire  [31:0] gpio_out;


  //*******************************************************************
  // Register Read Assignments
  //*******************************************************************
  assign slave_readdata = 
        ( (slave_address == DEV_ID_ADDR )    && slave_read )  ? dev_id_r :
        ( (slave_address == GPIO_IN_ADDR )   && slave_read )  ? gpio_in_r :
        ( (slave_address == GPIO_OUT_ADDR )  && slave_read )  ? gpio_out_r : 32'h00000000 ;

  //*******************************************************************
  // Output Assignments
  //*******************************************************************
   
  // Output signals to external devices.
  assign gpio_outputs = {gpio_out_r[31:0]};
  assign irq_out = 1'b0;
  
  // Input signals for registers
  assign gpio_in        = gpio_inputs;
  assign gpio_out       = ( (slave_address == GPIO_OUT_ADDR )   && slave_write ) ? slave_writedata : gpio_out_r;


  
  //*******************************************************************
  // Registers
  //*******************************************************************
  always @ (posedge clk or posedge reset)
  begin
    if (reset == 1)
    begin
      dev_id_r    <= 32'hECE45318;
      gpio_in_r   <= 32'h00000000;
      gpio_out_r  <= 32'h00000000;
    end
    
    else
    begin
      dev_id_r    <= 32'hECE45318;
      gpio_in_r   <= gpio_in;
      gpio_out_r  <= gpio_out;
    end
  end

endmodule